The following page is a list of example designs that may be used with the HACCs. Each HACC may have different Alveo hardware, with different shells installed, so you will need to check the details of each project against the cluster hardware you want to run it on.
If you would like to contribute to this page by adding a reference to your project, please follow the contribution guidelines
Note: Note that these designs are untested, and may need some updates to get them to work with specific tool versions/shell versions or different Alveo boards to the versions they were originally developed with.
Project | Authors | Platform(s) |
---|---|---|
5-point motion estimation | Marco Rabozzi, Emanuele Del Sozzo, Lorenzo Di Tucci, Marco Domenico Santambrogio, Politecnico Di Milano | AWS F1 / Alveo U200 |
Approximate Page Rank | Alberto Parravicini, Francesco Sgherzi, Marco Santambrogio, Politecnico Di Milano | Alveo U200 |
Coyote | Dario Korolija et al., ETH Zurich | Alveo U250 / U280 |
DNA sequence analysis | Zaina Salym, Marc Codina, David Castells-Rufas, UAB | AWS F1 |
EasyNet | Zhenhao He et al., ETH Zurich | Alveo U280 |
ERBium | Fabio Maschi et al., ETH Zurich | AWS F1 / Alveo U250/ U280 |
FINN Dataflow DNN Accelerator Compiler | Xilinx Research | Alveo U250 / U280 |
Fletcher on Alveo example: Wikipedia search | Matthijs Brobbel, Jeroen van Straten, Joost Hoozemans, Delft University of Technology | Alveo U200 / U250 |
Flexible Communication Avoiding Matrix Multiplication on FPGA with HLS | Johannes de Fine Licht, Torsten Hoefler, ETH Zurich | Alveo U250 |
FPGA Accelerated Homomoprhic Computation on AWS | Furkan Turan, KU Leuven | AWS F1 |
FPGA-based Incremental Delaunay Triangulation Acceleration - parallelized Delaunay Triangulation builder | Alberto Giusti, Saverio Ricci, Marco D. Santambrogio, Politecnico Di Milano | Alveo U200 |
FPGA implementation of KMP algorithm | Sofia Breschi, Beatrice Branchini, Marco D. Santambrogio, Politecnico Di Milano | Alveo U200 |
HPCG Benchmark on FPGA | Xilinx Research | Alveo U280 |
Key-Value Store with user-defined processing (Multes) | Zsolt Istvan, ITU Copenhagen (with help from Zhenhao He, ETH Zurich) | Alveo U250 / U280 |
N-body simulation | Emanuele Del Sozzo, Marco Rabozzi, Marco Nanni, Prof. Marco Santambrogio, Politecnico Di Milano | |
N-body simulation | Johannes de Fine Licht ETH Zurich | Alveo U250 |
OctoRay: Framework for Scalable FPGA Cluster Acceleration of Python Big Data Applications | Jakoba Petri-König, Shashank Aggarwal, Joost Hoozemans, Zaid Al-Ars, Delft University of Technology | Alveo U50 / U250 / U280 |
Portable Linear Algebra on FPGA using Data-Centric Parallel Programming | Manuel Burger, Johannes de Fine Licht and Torsten Hoefler, ETH Zurich | Alveo U250 |
Single-FPGA and Multi-FPGA ResNet50 / MobileNet Accelerators using FINN and InAccel Coral | Tobias Alonso, Lucian Petrica, Mario Ruiz, Jakoba Petri-Koenig, Yaman Umuroglu, Ioannis Stamelos, Elias Koromilas, Michaela Blott, Kees Vissers | Alveo U250 / U280 |
UDP Encryption and Decryption Example | Suranga Handagala, Northeastern University | Alveo U280 |
Vitis Network Examples | Mario Ruiz, AUP | Alveo U50 / U55C / U250 / U280 |
X-drop on FPGA | Alberto Zeni, Guido Walter Di Donato, Marco D. Santambrogio, Politecnico Di Milano | U280 |
PYNQ Alveo examples can be found on the PYNQ community.
Copyright© 2022-2024 Advanced Micro Devices